There is a moment in every hardware enthusiast’s life when emulation stops being enough and you want a real CPU you can hold, modify, and watch toggle actual pins. With RISC-V and an inexpensive FPGA, that is genuinely achievable on a weekend. This is a friendly introduction to running a RISC-V softcore.
What a Softcore Is
An FPGA — Field-Programmable Gate Array — is a chip whose logic you can reconfigure. A softcore is a CPU described in hardware (Verilog/VHDL or generated from a language like Chisel) and loaded onto that fabric. The FPGA literally becomes a RISC-V processor — with real timing and real I/O — unlike QEMU, which emulates a CPU in software. Because the RISC-V ISA is open, the internet is full of free, high-quality cores you can use.
Three Cores Worth Knowing
| Softcore | Size | Good for |
|---|---|---|
| PicoRV32 | Tiny | Smallest footprint, easiest start |
| VexRiscv | Configurable | The sweet spot — small to Linux-capable |
| Rocket | Large | Full application-class, can boot Linux |
If you are starting out, PicoRV32 fits on the cheapest boards and is wonderfully simple. VexRiscv is the popular middle ground — highly configurable and well documented. Rocket (from the Chipyard world) is for when you want a serious, Linux-capable design.
The Flow, End to End
Getting a softcore running follows a predictable path:
- Get the core — clone an open softcore (PicoRV32, VexRiscv).
- Configure it — pick extensions, memory size, and peripherals.
- Synthesize the HDL to a bitstream with your FPGA vendor’s tools (or open flows like Yosys/nextpnr for supported parts).
- Program the FPGA with the bitstream.
- Run software — load firmware built with a RISC-V toolchain and watch it execute on your CPU.
Stages 1–3 cost nothing but time; the only purchase is an affordable board.
You Don’t Need Expensive Hardware
A common myth is that FPGAs are costly. Entry-level boards run in the tens of dollars and easily host a small softcore. That low barrier is exactly what makes RISC-V softcores such a powerful learning tool — and it underpins open education efforts like One Student One Chip, where students go from theory to a working processor.
Why Bother?
Running a softcore is the best way to truly understand a processor. You can:
- Watch the boot flow execute on hardware you control.
- Modify the core — add an instruction, change the pipeline — and see the effect.
- Debug with real JTAG and OpenOCD instead of a simulator.
It is the difference between reading about how a CPU works and building one that does.
The Bottom Line
A RISC-V softcore on an FPGA is the most hands-on way to learn computer architecture, and it has never been more accessible: grab an open core like PicoRV32 or VexRiscv, synthesize it, program a cheap board, and run real firmware on a CPU you can inspect and change. Emulation tells you what a processor does; a softcore lets you discover how — and maybe build a better one. For students, hobbyists, and curious engineers, there is no better playground than open hardware on open silicon.
Part of my RISC-V series. See also Chisel and Chipyard and open-source cores.
