Hosting RISC-V Summit Europe 2026 in Bologna was fitting. More than any other region, Europe has tied its computing future to the open ISA — not for ideology, but for strategy. Digital sovereignty has become a defining policy goal, and RISC-V is one of its most important instruments. Here is why.
What Digital Sovereignty Means
Digital sovereignty is the ability to control your own digital infrastructure — hardware, software, and data — without dependence on technology controlled by another country or a single foreign company. For semiconductors specifically, it means being able to design and manufacture the chips you depend on, rather than being a permanent customer subject to others’ licensing terms and export controls.
The last few years made the stakes concrete: supply-chain shocks, export restrictions, and the realization that AI capability is now national capability. A region that cannot build its own compute is strategically exposed.
Why an Open ISA Is the Right Foundation
Proprietary ISAs are structurally incompatible with sovereignty. You cannot license x86 to build your own server CPU, and ARM — however capable — is controlled by a single company subject to its own jurisdiction’s rules. Either way, the control sits elsewhere.
RISC-V removes that dependency at the most fundamental layer, the instruction set:
- No licensing gatekeeper — European institutions can design RISC-V chips without asking permission.
- No royalties — investment stays in the region rather than flowing out as per-unit fees.
- Auditable by design — an open ISA can be inspected end to end, important for security-critical and government use.
- Regional supply chains — designs can be developed and increasingly manufactured within Europe.
This is exactly why “sovereign AI” recurred throughout the Summit, and why it pulls RISC-V into the datacenter.
Europe’s RISC-V Initiatives
Europe is not theorizing — it is building. A non-exhaustive map:
- Barcelona Supercomputing Center (BSC) has long led European RISC-V accelerator research, developing vector and HPC-oriented designs as part of the push toward European processors.
- The PULP platform — a collaboration between ETH Zurich and the University of Bologna — is one of the most influential open RISC-V hardware projects in the world, feeding everything from ultra-low-power edge cores to the Monte Cimone HPC cluster.
- Quintauris, a joint venture backed by Bosch, Infineon, Nordic, NXP, and Qualcomm, is driving RISC-V for automotive — a strategic European industry.
- EuroHPC initiatives fund the development of European RISC-V processors and accelerators for the continent’s supercomputers.
- Codasip (Czech Republic) and a constellation of startups and research labs round out a deep regional base.
The Policy Backbone: The EU Chips Act
This activity sits on a policy foundation. The EU Chips Act aims to strengthen Europe’s semiconductor capacity and reduce dependency on foreign supply. RISC-V aligns naturally with those goals: it lowers the barrier to designing competitive silicon domestically and keeps the foundational IP open rather than imported.
The combination of strong academic communities (Bologna, ETH Zurich, BSC, and many more) and committed industrial players is exactly what the Summit organizers highlighted — Europe’s blend of research depth and industrial capability is a genuine competitive advantage for open hardware.
Sovereignty Beyond Europe
The European story is the most developed, but the logic is universal. At the Summit, presentations argued that open architecture lets accession countries and emerging economies leapfrog into compute capability — building national AI infrastructure on RISC-V rather than consuming someone else’s. From environmental-sensing networks to national AI factories, the same principle applies: open silicon is an instrument of sovereignty wherever you are.
The Honest Caveats
Sovereignty is a direction of travel, not a switch:
- Manufacturing remains the hard part — designing a chip is not the same as fabricating it at leading-edge nodes within the region.
- The software long tail still needs work, though profiles like RVA23 are closing the gap.
- Performance at the very top end still trails incumbents, as I discuss in RISC-V vs ARM vs x86.
But sovereignty does not require being first on every benchmark. It requires control — the ability to build, audit, and evolve your own compute. On that measure, RISC-V is uniquely suited.
The Bottom Line
Europe’s embrace of RISC-V is one of the clearest signals of where computing is heading. When a region decides that the foundation of its digital future should be open rather than licensed, it changes the incentives for the entire industry. Bologna 2026 was not just a technical conference — it was a statement that open silicon and digital sovereignty are now the same project.
Read the rest of my RISC-V coverage: the Summit highlights, open hardware meets AI, and the ecosystem in 2026.
