From Zero to Tape-Out: The Open Chip Education Revolution
At RISC-V Summit Europe 2026 in Bologna, Xiaoke Su from the Beijing Institute of Open Source Chip (BOSC) presented one of the most inspiring talks of the conference: the “One Student One Chip” (YSYX) initiative — a free, open-source MOOC that teaches anyone to build a complete RISC-V processor from scratch and take it all the way to silicon tape-out.
The Learning Roadmap
The program takes students from absolute beginners to chip designers through a structured multi-stage journey:
- Fill a form (~10 minutes) — application entry
- Preliminary (~1-2 months) — C programming fundamentals
- Interview (~15 minutes) — screening
- Basic (~2 months) — implementing a simple RISC-V CPU
- Advanced (~3 months) — out-of-order execution, caches, SoC integration
- Debug Exam (~1 hour) — hands-on debugging test
- SoC Integration (~1 week) — connecting your core to peripherals
- Physical design (~2 months) — layout and timing closure
- Tape-out (~2-4 months) — sending to fab
- Packaging (~2 weeks) → PCB Testing (~1 week) → Run demos (~1 week)
The end result: a physical chip that you designed, running your own demos.
OSOC Course Design: Full-Stack Training
The Open Source SoC (OSOC) curriculum covers the entire hardware-software stack:
Software track:
- GCC, LLVM, U-boot, OpenSBI
- UEFI, QEMU, Linux
Chip design track:
- XiangShan processor, coherency, OoO execution
- Cache, branch prediction, extensions
- IP integration
EDA track:
- Place and route, standard cell
- Floorplan, timing analysis, clock tree
- Technology mapping, equivalence checking
The philosophy: “Everyone is welcomed. NO limitation on university, major, grade, or basis.” This is education equality through open hardware.
Learning Stage Division
The curriculum progressively builds complexity:
| Stage | Target | ISA | Architecture | Software |
|---|---|---|---|---|
| F, E | 3 instructions | Single-cycle | - | - |
| D | 9 instructions | Single-cycle | Device (sim) | Super Mario, RT-Thread |
| C | RV32E (45 inst.) | Single-cycle | Device (RTL) | Super Mario, RT-Thread |
| B | RV32E (45 inst.) | Pipeline + cache | Bus + SoC, Device (RTL) | Super Mario, RT-Thread |
| A | RV32GC (100 inst.) | Pipeline + cache, +Privilege, +MMU | Bus + SoC, Device (RTL) | PAL (game)/Debian, Self-design OS/Linux |
| S | Advanced | - | - | - |
Minimum Certification Level: Stage C Minimum Tape-out Level: Stage B
Students literally build CPUs that can run Super Mario and RT-Thread RTOS, progressing to full Linux-capable systems.
English Handouts Released (v24.07)
A major announcement: the English version of the study handouts (v24.07) is now available at ysyx.org/en. The materials include:
- “How to Ask Smart Questions” fundamentals
- Color-coded content types: Knowledge-related Tips, Further Reading, Optional Reflective Questions, Optional Programming Exercises, Required Tasks, Required Reading for Lab Progress, and Principles Beyond the Scope of the Lab
Open Learning Materials at Scale
The scale of open materials is staggering:
- Course website with full curriculum
- Handouts: 260,000 words
- Slides: Over 800 pages, 85,000 words
- Videos: Over 40 hours of teaching content
- Bilibili account for Chinese-language video delivery
- Teaching with slides, videos, and live demos
All materials are open-sourced. The git clone command is right in the handout — students get started by cloning the ysyx-workbench repository from GitHub.
Growth: 18,861 Enrolled Students
The growth trajectory is remarkable:
| Cohort | Accumulated Enrollments |
|---|---|
| 1st | 5 |
| 2nd | 16 |
| 3rd | 776 |
| 4th | 2,529 |
| 5th | 4,410 |
| 6th | 7,788 |
| 2024 | 10,181 |
| 2025 | 16,543 |
| 2026 | 18,861 |
From 5 students to nearly 19,000 in five years. This is what happens when you make chip design education free, open, and accessible — you get exponential growth.
The Full Auditorium
The packed room at Palazzo dei Congressi showed how much interest there is in open hardware education. Students, researchers, and industry professionals all leaning in.
Why This Matters
The “One Student One Chip” initiative represents a paradigm shift in hardware education:
- Democratization — no prerequisites, no expensive tools, no university affiliation required
- End-to-end — from “Hello YSYX” in C to a physical chip running Linux
- Open source — all tools, materials, and infrastructure are freely available
- Proven at scale — 18,861 students isn’t a pilot; it’s a movement
- Industry pipeline — graduates enter the RISC-V ecosystem with real tape-out experience
For the European RISC-V ecosystem, this provides a blueprint for sovereign semiconductor education without proprietary tool dependencies.
Student Learning Notes
A powerful detail from the talk: students maintain structured learning journals tracking Date, Task, Time dedicated, Issues encountered, and How to solve. This isn’t just a course — it’s a discipline system. The detailed Chinese-language notes show weeks of daily progress through the curriculum, documenting every bug and breakthrough.
This methodology builds engineering rigor from day one — the kind of systematic problem-solving that separates hobbyists from professional chip designers.
No Deadline for Learning
A refreshingly inclusive philosophy:
- Time to finish varies from weeks to years — different universities, majors, grades, basics
- Students without any background may spend over 500 hours (the time to take compulsory courses and finish all assignments)
- Students can always learn at their own timing schedule
- Once finished, they can apply for interview/exam
No artificial deadlines. No cohort pressure. Just mastery-based progression.
Enroll Anytime, Open Year-Round
The program is always open — no application windows, no waiting for the next semester. Visit ysyx.org/en, click “Signup”, and start building your own RISC-V processor today. There’s also a Telegram group for community support.
Global Expansion: OSOC Base in Kazakhstan
The initiative is going global. Professor Nursultan Kabylkas at Nazarbayev University (NU) in Kazakhstan runs an OSOC lab where most of his students have joined the program. It’s become the base and workshop for OSOC students at NU, forming an active student community.
The milestone: a Kazakh student Olzhas learned to design a RISC-V processor chip through OSOC and successfully powered it up — the first domestically designed processor chip in Kazakhstan. The professor soldered the chip onto the board himself, powered it up displaying test info, and shared the joy on social media. Kazakh netizens expressed national pride in this achievement.
International Promotion and Exchange
OSOC’s global footprint is expanding rapidly:
- March 2025: Visited Kazakhstan for academic exchange — first domestically designed chip
- May 2025: Participated in RISC-V Summit Europe
- June 2025: Attended Global RISC-V Workshop in Brazil
- July 2025: Visited City University of Hong Kong for campus events
- March 2026: Attended Pakistan Semiconductor Summit
From Beijing to Bologna to Brazil — open hardware education without borders.
Tracking Progress at Scale
The program tracks each student’s learning notes and meeting attendance with a detailed color-coded timeline. The Gantt-style visualization shows individual progress through stages — some students blast through in months, others take a year or more. Both paths are valid.
OSOC Roadshow Events
The team runs a travelling roadshow across Chinese universities, bringing OSOC directly to students. The red banners (“一生一芯计划”) are everywhere — packed lecture halls, campus events, hands-on workshops. They warmly invite institutions worldwide to reach out and host an OSOC visit.
Brought Up Chips, Ran OS and Applications
The ultimate proof: students who completed the program actually fabricated their chips and ran real software on them. The slide shows terminal outputs, FPGA boards, and video calls with students from multiple universities demonstrating their working processors. Videos available on Bilibili.
Student Demo: Booting Linux on Student-Designed Silicon
A computer science student who began studying OSOC as a junior demonstrated the ultimate achievement: loading Linux from flash and booting successfully, displaying the CAS (Chinese Academy of Sciences) logo. “Hello UCAS@YSYX By Chen Lu” — a student-designed RISC-V processor running a real operating system.
From Design to Silicon: The Chip and Board
The complete pipeline from design to physical chip: RTL layout → wafer fabrication → die packaging → PCB board. Students don’t just simulate — they tape out real silicon and solder it onto custom boards. This is the full-stack hardware education dream realized.
Resources
- Website: ysyx.org/en
- Organization: Beijing Institute of Open Source Chip (BOSC), University of Chinese Academy of Sciences, Institute of Computing Technology
- English handouts: v24.07 now available
