A quick look around the show floor at RISC-V Summit Europe 2026 in Bologna β this time at the high-performance end of the ecosystem, where InspireSemi and NextSilicon were showing what RISC-V can do for HPC and AI.

InspireSemi β RISC-V Supercomputing Accelerators
InspireSemi builds RISC-V supercomputing accelerators aimed squarely at HPC and AI workloads β the kind of high-throughput silicon that big simulation and training jobs demand. On the booth was Doug Norton, Chief Marketing Officer. Putting supercomputing-class accelerators on an open ISA is one of the clearest signs that RISC-V is moving up the performance ladder, well beyond its embedded roots.
NextSilicon β High-Performance Compute for HPC and Data Centers
NextSilicon focuses on high-performance compute for HPC and data centers, represented by Tom Paulick from Business Development. Their presence rounds out a picture of RISC-V increasingly showing up where raw throughput and datacenter-scale deployment matter most.
A Snapshot of High-Performance RISC-V
Seeing these two booths side by side is a useful snapshot of where the RISC-V ecosystem is heading. The story is no longer just microcontrollers and dev boards β it now stretches into supercomputing and AI acceleration, the same frontier that Europeβs HPC sovereignty efforts are targeting. Open silicon is steadily earning a seat at the high-performance table.
The Bottom Line
InspireSemi and NextSilicon are two more data points in a clear trend: RISC-V is being taken seriously for the most demanding HPC and AI workloads. A short walk across one show floor in Bologna captured supercomputing accelerators and data-center compute, both built on the open ISA β the high-performance future of RISC-V on display.
Recorded at RISC-V Summit Europe 2026, Bologna, Italy, 8β12 June 2026 β no spoken audio on this floor clip; booth details from the surrounding materials. Part of my RISC-V series β see also the Summit highlights and RISC-V in HPC & supercomputing.



