Blog
1541+ articles — Page 4 of 65
RISC-V Virtualization: The H Extension & KVM
How virtualization works on RISC-V — the hypervisor (H) extension, two-stage translation, KVM, and running virtual machines on open silicon. A systems guide.
4 min read
RISC-V vs ARM vs x86: How the Open ISA Compares
How RISC-V stacks up against ARM and x86 on licensing, performance, software maturity, and customization — and where each architecture wins in 2026.
5 min read
The RISC-V ABI and Calling Convention Explained
How RISC-V code actually fits together — registers, the psABI, argument passing, the stack, and ILP32 vs LP64. A practical guide to the calling convention.
4 min read
Embedded Rust on RISC-V: A Practical Guide
Rust and RISC-V are a natural pair. How to write embedded Rust for RISC-V microcontrollers — targets, no_std, PACs, HALs, and flashing real hardware.
3 min read
RISC-V Floating-Point Extensions: F, D, Q and More
How RISC-V does floating-point — the F, D, and Q extensions, the f registers, rounding modes, and lightweight options like Zfh and Zfinx for small cores.
3 min read
Build a RISC-V Softcore on an FPGA
Turn a cheap FPGA into a real RISC-V CPU. A practical intro to softcores like PicoRV32 and VexRiscv — what they are, how the flow works, and how to start.
3 min read
Performance Profiling and Counters on RISC-V
Make RISC-V code fast — hardware performance counters (HPM), the cycle and instret CSRs, perf on Linux, and a sane workflow for finding real bottlenecks.
3 min read
Running Zephyr RTOS on RISC-V
Zephyr is the open RTOS of choice for modern RISC-V microcontrollers. What Zephyr is, why it fits RISC-V, and how its build and driver model work.
3 min read
Running Containers and Kubernetes on RISC-V
Yes, RISC-V runs Docker and Kubernetes. How container images, multi-arch builds, and the cloud-native stack work on RISC-V — and what's still maturing.
3 min read
One Student One Chip: 18,861 Students Build RISC-V Chips
BOSC's One Student One Chip teaches students to design RISC-V processors from ISA to GDSII tape-out. At RISC-V Summit Europe 2026, 18,861 enrollments revealed.
9 min read
RISC-V Summit Europe 2026: Hardware Innovation from Bologna
My experience at RISC-V Summit Europe 2026 in Bologna — from Tenstorrent Blackhole to Monte Cimone v3 HPC, ESWIN server CPUs, and open-silicon research.
13 min read
RISC-V Summit Europe 2026: Open Hardware Meets AI in Bologna
On-the-ground coverage from RISC-V Summit Europe 2026 in Bologna — SiFive, ETH Zurich, Qualcomm, and Luxottica on open silicon for AI and smart eyewear.
14 min read
Reliable AI Agents in Java with LangChain4J — Workshop
Packt workshop with Susanne Pieterse on building production-ready AI agents in Java with LangChain4J — guardrails, evaluation, observability. June 13, 2026.
2 min read
Fix OpenClaw ERR_STRING_TOO_LONG Session Error
OpenClaw agent fails with 'Cannot create a string longer than 0x1fffffe8 characters'? It's a bloated session JSONL hitting Node's string limit. Here's the fix.
3 min read
EPIC Semi's RISC-V AI Server Runs Ubuntu
At RISC-V Summit Europe 2026 I met Chloe Jian Ma of EPIC Semi to discuss the first RISC-V AI server — 48 cores, 16 AI cores, and Ubuntu booting live.
3 min read
OmniTrust: Visibility & Control for AI
At RISC-V Summit Europe 2026 I met Toby from OmniTrust, building an ecosystem of visibility, control and transparency so AI can speed up innovation safely.
2 min read
Why 9 in 10 High-Tech Startups Stall
At RISC-V Summit Europe 2026 I met Frederik on the business side of deep tech — go-to-market, market strategy, and a playbook to grow from unknown to player.
2 min read
RISC-V: From Dev Boards to AI Servers
A floor tour at RISC-V Summit Europe 2026 showing how RISC-V now scales from small embedded dev boards to Tenstorrent AI compute and Scaleway servers.
2 min read
InspireSemi & NextSilicon: RISC-V HPC
A show-floor look at RISC-V Summit Europe 2026: InspireSemi's RISC-V supercomputing accelerators and NextSilicon's high-performance compute for HPC and AI.
2 min read
Turn Google Search Console Data Into a Growth Plan
Run one dependency-free Python script on your Search Console export to surface the SEO levers that move traffic: CTR bands and striking-distance pages.
11 min read
AI Model Serving on K8s: vLLM vs Triton vs NIM (2026)
Compare vLLM, Triton Inference Server, and NVIDIA NIM for serving LLMs on Kubernetes. Throughput benchmarks, deployment patterns, and production configuration.
5 min read
AI Observability on Kubernetes: Monitor LLM Performance
Implement AI observability for LLM workloads on Kubernetes. Track token latency, TTFT, throughput, hallucination rates, and cost per request.
4 min read
Argo CD: GitOps Continuous Deployment for Kubernetes
Production-ready Argo CD setup — ApplicationSets, multi-cluster sync, RBAC, notifications, and progressive delivery patterns.
2 min read
Cilium & eBPF: Next-Gen Kubernetes Networking
Replace kube-proxy with Cilium — eBPF-powered networking, transparent encryption, network policies, and service mesh without sidecars.
2 min read